: | XC2VP30-5FF1152I |
---|---|
: | Embedded,FPGAs (Field Programmable Gate Array) |
: | Xilinx Inc. |
: | 1.5V V 3.4mm mm |
: | - |
: | Tray |
: | YES |
TYPE | DESCRIPTION |
Factory Lead Time | 6 Weeks |
Mount | Surface Mount |
Mounting Type | Surface Mount |
Package / Case | 1152-BBGA, FCBGA |
Number of Pins | 1152 |
Operating Temperature | -40°C~100°C TJ |
Packaging | Tray |
Published | 2011 |
Series | Virtex®-II Pro |
JESD-609 Code | e0 |
Pbfree Code | no |
Part Status | Obsolete |
Moisture Sensitivity Level (MSL) | 4 (72 Hours) |
ECCN Code | 3A991.D |
Terminal Finish | Tin/Lead (Sn63Pb37) |
Subcategory | Field Programmable Gate Arrays |
Technology | CMOS |
Voltage - Supply | 1.425V~1.575V |
Terminal Position | BOTTOM |
Terminal Form | BALL |
Peak Reflow Temperature (Cel) | 225 |
Supply Voltage | 1.5V |
Terminal Pitch | 1mm |
Time@Peak Reflow Temperature-Max (s) | 30 |
Base Part Number | XC2VP30 |
Number of Outputs | 644 |
Qualification Status | Not Qualified |
Operating Supply Voltage | 1.5V |
Number of I/O | 644 |
RAM Size | 306kB |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
Number of Logic Elements/Cells | 30816 |
Total RAM Bits | 2506752 |
Number of LABs/CLBs | 3424 |
Speed Grade | 5 |
Number of Registers | 27392 |
Combinatorial Delay of a CLB-Max | 0.36 ns |
Height Seated (Max) | 3.4mm |
RoHS Status | Non-RoHS Compliant |