: | ISPPAC-CLK5620AV-01T100I |
---|---|
: | 时钟/定时-时钟生成器、PLL、频率合成器 |
: | Lattice Semiconductor Corporation |
: | 3.3V 400MHz ISP |
: | - |
: | Tray |
: | YES |
TYPE | DESCRIPTION |
Mount | Surface Mount |
Mounting Type | Surface Mount |
Package / Case | 100-LQFP |
Number of Pins | 100 |
Operating Temperature | -40°C~85°C |
Packaging | Tray |
Published | 2000 |
Series | ispClock™ |
JESD-609 Code | e0 |
Pbfree Code | no |
Part Status | Obsolete |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
Number of Terminations | 100 |
ECCN Code | EAR99 |
Terminal Finish | Tin/Lead (Sn/Pb) |
Subcategory | Clock Drivers |
Voltage - Supply | 3V~3.6V |
Terminal Position | QUAD |
Terminal Form | GULL WING |
Peak Reflow Temperature (Cel) | 240 |
Number of Functions | 1 |
Supply Voltage | 3.3V |
Terminal Pitch | 0.5mm |
Time@Peak Reflow Temperature-Max (s) | 30 |
Base Part Number | ISPPAC-CLK5620A |
Output | EHSTL, HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL |
Pin Count | 100 |
Number of Outputs | 20 |
Operating Supply Voltage | 3.3V |
Supply Voltage-Max (Vsup) | 3.6V |
Supply Voltage-Min (Vsup) | 3V |
Number of Circuits | 1 |
Nominal Supply Current | 7mA |
Frequency (Max) | 400MHz |
Family | 5600 |
Input | HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL |
Ratio - Input:Output | 2:20 |
Logic IC Type | PLL BASED CLOCK DRIVER |
PLL | Yes with Bypass |
Differential - Input:Output | Yes/Yes |
Propagation Delay (tpd) | 8.8 ns |
Divider/Multiplier | Yes/No |
fmax-Min | 400 MHz |
Same Edge Skew-Max (tskwd) | 0.05 ns |
Radiation Hardening | No |
RoHS Status | Non-RoHS Compliant |
Lead Free | Contains Lead |