| ： | ISPPAC-CLK5410D-01SN64I |
|---|---|
| ： | 时钟/定时-时钟生成器、PLL、频率合成器 |
| ： | Lattice Semiconductor Corporation |
| ： | 3.3V 400MHz ISP |
| ： | - |
| ： | Tray |
| ： | YES |
| TYPE | DESCRIPTION |
| Factory Lead Time | 8 Weeks |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 64-VFQFN Exposed Pad |
| Number of Pins | 64 |
| Operating Temperature | -40°C~85°C |
| Packaging | Tray |
| Published | 2000 |
| Series | ispClock™ |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 64 |
| ECCN Code | EAR99 |
| Subcategory | Clock Drivers |
| Technology | CMOS |
| Voltage - Supply | 3V~3.6V |
| Terminal Position | QUAD |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Base Part Number | ISPPAC-CLK54 |
| Output | HCSL, HSTL, LVDS, LVPECL, MLVDS, SSTL |
| Pin Count | 64 |
| Operating Supply Voltage | 3.3V |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Circuits | 1 |
| Nominal Supply Current | 99mA |
| Frequency (Max) | 400MHz |
| Family | AC |
| Input | HCSL, HSTL, LVDS, LVPECL, MLVDS, SSTL |
| Ratio - Input:Output | 2:10 |
| Logic IC Type | PLL BASED CLOCK DRIVER |
| Max I(ol) | 0.009 A |
| PLL | Yes with Bypass |
| Differential - Input:Output | Yes/Yes |
| Divider/Multiplier | Yes/No |
| fmax-Min | 400 MHz |
| Length | 9mm |
| Width | 9mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
